The shrinking dimensions of active devices on silicon chip is approaching its limit due to restrictions set by photolithographic techniques. For example, wave properties of radiation, such as interference and diffraction, can limit device size and density. Considerable research has taken place to overcome the limitations of photolithographic techniques.
The research has been directed at correcting the problems, such as by phase shift lithography as well as to developing other novel approaches. Concomitantly, with this research, there have been developments in device design utilizing electron confinement in small volume. The three basic categories are such devices design are Quantum Dots (QD), Resonant Tunneling Devices (RTD), and Single Electron Transistors (SET). Quantum Dots are discussed in greater detail in R. Turton, The Quantum Dot, Oxford, U.K., Oxford University Press, 1995; Resonant Tunneling Devices are discussed in greater detail in A. C. Seabaugh et al., Future Electron Devices (FED) J., Vol. 3, Suppl. 1, pp. 9-20, (1993); and Single Electron Transistors are discussed in greater detail in M. A. Kastner, Rev. Mod. Phys., Vol. 64, pp. 849-858, (1992); the entire disclosures of all of which is hereby incorporated by reference.